Cornelis Networks is seeking a Senior ASIC Design Engineer with expertise in one or more critical areas to develop world-class SoCs for high-performance computing, advanced data analytics, and AI interconnect solutions.
Requirements
B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or related field
8+ years of post-college experience in digital design with proficiency in Verilog and System Verilog
Experience in RTL design for high-speed data paths or packet processing in ASICs
Deep understanding of Host Ethernet adaptor architectures
Familiarity with timing closure and modern physical design methodologies
Proven ability in system-level debug and root cause analysis of technical issues
Strong verbal and written communication skills Benefits
Medical, dental, and vision coverage
Disability and life insurance
Dependent care flexible spending account
Accidental injury insurance
Pet insurance
Generous paid holidays
401(k) with company match
Open Time Off (OTO) for regular full-time exempt employees
Sick time
Bonding leave
Pregnancy disability leave
